Microchip DSPIC33FJ12GP201-E/SO

DSPIC33FJ12GP201-E/SO Description générale

dsPIC Automotive, AEC-Q100, dsPIC™ 33F Microcontroller IC 16-Bit 40 MIPs 12KB (12K x 8) FLASH 18-SOIC

Caractéristiques

• Operating Range
• Up to 40 MIPS operation (at 3.0-3.6V)
• Industrial temperature range (-40°C to +85°C)
• Extended temperature range (-40°C to +125°C)
• High-Performance dsPIC33F core
• Modified Harvard architecture
• C compiler optimized instruction set
• 16-bit wide data path, 24-bit wide instructions
• Linear program memory addressing up to 4M instruction words
• Linear data memory addressing up to 64 Kbytes
• 83 base instructions, mostly one word/one cycle
• Sixteen 16-bit general purpose registers
• Two 40-bit accumulators with rounding and saturation options
• Flexible and powerful addressing modes: - Indirect - Modulo - Bit-Reversed
• Software stack
• 16 x 16 fractional/integer multiply operations
• 32/16 and 16/16 divide operations
• Single-cycle MAC with accumulator write back for DSP operations and dual data fetch
• Up to ±16-bit shifts for up to 40-bit data
• Interrupt Controller
• 5-cycle latency
• Up to 21 available interrupt sources
• Up to three external interrupts
• Seven programmable priority levels
• Four processor exceptions
• On-Chip Flash and SRAM
• Flash program memory (12 Kbytes)
• Data SRAM (1024 bytes)
• Boot and General Security for Program Flash
• Digital I/O
• Peripheral Pin Select Functionality
• Up to 21 programmable digital I/O pins
• Wake-up/interrupt-on-change for up to 21 pins
• Output pins can drive from 3.0V to 3.6V
• Up to 5V output with open drain configurations on 5V tolerant pins
• 4 mA sink on all I/O pins
• System Management
• Flexible clock options: - External, crystal, resonator, internal RC - Fully Integrated Phase-Locked Loop (PLL) - Extremely low-jitter PLL
• Power-up Timer
• Oscillator Start-up Timer/Stabilizer
• Watchdog Timer with its own RC oscillator
• Fail-Safe Clock Monitor
• Power Management
• On-chip 2.5V voltage regulator
• Switch between clock sources in real time
• Idle, Sleep and Doze modes with fast wake-up
• Timers/Capture/Compare
• Up to three 16-bit timers which can pair up to make one 32-bit timer
• Input Capture (up to four channels): - Capture on up, down, or both edges
• 16-bit capture input functions, 4-deep FIFO on each capture
• Output Compare (up to two channels) with Single or Dual 16-bit Compare mode
• Communication Modules
• 4-wire SPI: - Framing supports I/O interface to simple codecs, supports 8-bit and 16-bit data and supports all serial clock formats and sampling modes
• I2C™: - Full Multi-Master Slave mode support, 7-bit and 10-bit addressing, bus collision detection and arbitration, slave address masking and integrated signal conditioning
• UART: - Provides LIN bus support, IrDA® encoding and decoding in hardware, High-Speed Baud Mode and Hardware Flow Control with CTS and RTS
• Analog-to-Digital Converters (ADCs)
• ADC with 10-bit, 1.1 Msps or 12-bit, 500 Ksps conversion
• Two and four simultaneous samples (10-bit ADC)
• Up to 10 input channels with auto-scanning
• Conversion start can be manual or synchronized with one of four trigger sources
• Conversion possible in Sleep mode
• Packaging
• 18-pin PDIP/SOIC
• 28-pin SPDIP/SOIC/SSOP/QFN

Caractéristiques